Preparing a quantum range without extra qubits

A quantum algorithm needs an input state before its main calculation can begin. Preparing that state can itself be costly, so an efficient computational routine does not automatically deliver an efficient end-to-end algorithm.

In an arXiv preprint, Alok Shukla and Prakash Vedula address one structured input: a uniform superposition over any nonempty interval of integer labels. Their construction uses no additional workspace qubits and has a worst-case logical gate count proportional to the number of qubits in the register. This is a theoretical circuit result, not a demonstration of practical quantum advantage.

What is being prepared?

An n-qubit register has computational-basis labels from zero through 2ⁿ − 1. The goal is to select a starting integer a and a length M, then prepare equal, positive amplitudes on a through a + M − 1, with zero amplitude elsewhere. Measuring the register would return each selected integer with probability 1/M.

Some ranges are straightforward. Preparing all possible labels requires a Hadamard gate on each qubit. An aligned block whose length is a power of two also has a simple binary structure. Arbitrary endpoints are harder: the desired range may cross a binary boundary without filling either side.

The authors build on their earlier method for ranges that start at zero. Rather than prepare such a range and then add an offset, the new construction works directly with both endpoints.

Sharing the work between two branches

The circuit identifies the highest binary position where the first and last labels differ. That position determines an enclosing aligned block with power-of-two length. Splitting at that block’s midpoint divides the target range into lower and upper branches—not necessarily equal halves.

For example, the integers three through ten split at eight. The lower branch contains five labels, three through seven; the upper contains three, eight through ten. A selector qubit receives probabilities five-eighths and three-eighths, matching the branches’ sizes.

The method then expresses the branch lengths using power-of-two blocks. Five decomposes into four plus one; three into two plus one. Instead of building unrelated circuits, it creates a shared block structure that accommodates both decompositions. Rotations assign probability to the selected blocks, and controlled Hadamard gates spread that probability uniformly within them.

A useful identity implements different branch-dependent rotations with three singly controlled gates at later selection stages. Its crucial condition is that the target qubit still starts in zero. It is not a general replacement for arbitrary doubly controlled operations.

Finally, branch-dependent bit flips move the occupied blocks into the desired positions. These corrections use bitwise XOR, which is not generally the same as integer addition.

What the resource claim means

For the specified direct construction, the authors prove an exact worst-case count of 5n − 9 logical gates for n of at least three. The maxima for one and two qubits are one and three gates, respectively. No ancillary, or workspace, qubits are required.

They also establish a linear worst-case lower bound for circuits whose gates touch at most two qubits. Thus the construction has the best possible scaling with register width in that model. This does not establish the smallest possible constant or the shortest circuit for every interval.

Individual ranges can cost substantially less. A separate bound combines a term logarithmic in interval length with an offset-dependent contribution that counts set bits in certain binary prefixes and correction masks. A short interval is therefore not automatically cheap regardless of its location.

A reflected construction processes blocks in the opposite size order. A classical compiler chooses the lower-count candidate. For the range one through 64 in a seven-qubit register, the paper reports 26 logical gates for the direct circuit and 13 for the reflected version. That example is not a universal reduction factor.

Limits and extensions

The gate model allows arbitrary real rotation angles and counts each one-qubit or singly controlled one-qubit operation as one gate. The headline count is not a CNOT count. Compiling rotations into a fixed discrete gate set can introduce approximation and additional cost; restricted connectivity can add routing overhead. Neither is included.

The direct construction also has a linear logical-depth upper bound, but the paper does not prove a matching depth lower bound. Selecting fewer gates need not select lower depth.

Extensions cover bitwise-XOR images of intervals, arithmetic progressions with power-of-two spacing, and states with different probabilities assigned to blocks while remaining uniform within each block. They do not provide a general solution for arbitrary supports or amplitudes.

These findings remain preprint claims. This account uses the supplied paper-text extraction, which omits figures and may damage equations, tables or layout; no OCR was available. The resource bounds should be read as mathematical guarantees under stated assumptions, not measured hardware performance.