TRANSMISSION // 2610.31882v2
An AI agent helps design a sub-terahertz transmitter—with human oversight
Source published
TACS-RF connects a language-model coding agent to electronic-design-automation tools and uses them to help design a transmitter targeting 240–251 GHz. The authors report simulation results for a design with extracted device parasitics and electromagnetic-verified passives. This single case is not a fabricated, measured chip or evidence of fully autonomous design.

Could an AI agent do more than write code? TACS-RF explores whether one can help design a radio-frequency circuit by operating the specialized software engineers use. The authors test the approach on a transmitter targeting frequencies near a quarter of a terahertz. They report encouraging simulation results, while describing a semi-autonomous workflow in which people provide guidance and retain key verification and integration roles.
Designing a radio-frequency chip involves more than choosing a circuit diagram. At very high frequencies, a circuit’s physical layout can affect its behavior. Engineers therefore iterate between circuit simulation, layout, electromagnetic (EM) simulation, and checks that account for manufacturing rules and electrical parasitics. Here, parasitic extraction includes resistance, capacitance, and coupling capacitance associated with transistor layouts.
TACS-RF, short for Tool-driven Agentic Circuit Synthesis of RF and mmWave Modules, asks whether a language-model coding agent can coordinate parts of this work. Liang and Nagulu connected Claude Opus 4.8 to electronic-design-automation tools, including Cadence Virtuoso/Spectre, Calibre, Cadence EMX, and Ansys HFSS. The agent used scripts and command-line interfaces, received machine-readable simulation results, and used those results to guide further iterations. According to the paper, the tools were operated without human interaction through graphical interfaces.
A demanding test case
The authors demonstrate the workflow on a transmitter targeting 240–251 GHz, using a 90-nanometer silicon-germanium BiCMOS process. Its signal chain includes a 60 GHz push-push Colpitts voltage-controlled oscillator with second-harmonic extraction, differential power-driver stages, a push-push frequency doubler, interstage matching networks, and a bowtie antenna.
The agent worked from specifications, selected prior research, design guidance, and example layouts. It characterized transistors in circuit simulations, explored device sizes and bias settings, and optimized circuit blocks. It designed parameterized transformer and inductor structures for EM simulation and generated the antenna layout. Human designers supplied a library of transistor layouts; the agent selected from it, ran physical checks, and extracted parasitics. The resulting device and passive models were fed back into circuit-level evaluation.
That feedback loop matters because a passive structure’s simulated electromagnetic behavior can affect how the complete circuit performs. The agent iterated on circuit and passive parameters using the assembled chain’s simulated results. People provided specifications and guidance, validated results, gave design feedback, performed final verification, and remained responsible for top-level integration.
What the simulations showed
The paper’s abstract reports output power of +5.1 to +6.3 dBm across an 11 GHz varactor-only tuning range, with phase noise of −80 to −88 dBc/Hz at a 1 MHz offset and DC power consumption of 361 mW. In its results section, the paper specifically reports that the complete chain delivers +6.3 dBm at 246 GHz and describes the tuning range; it does not restate the full output-power range there. These are simulation results using parasitic-extracted devices and EM-simulated passive components—not measurements from a manufactured transmitter.
The authors state that the transmitter chain was designed in under a week, compared with two to three months for a comparable manual design flow. The supplied paper text does not establish that this duration was independently measured or that the comparison was controlled. It also identifies EM simulation runtime as a bottleneck.
What remains uncertain
The demonstration shows an AI agent participating in a complex RF design workflow; it does not show that the agent can independently design arbitrary chips. The case concerns one transmitter and uses human-provided specifications, prior designs, design guidance, and prepared transistor layouts. The authors describe the workflow as semi-autonomous, with human verification and integration still required. This evidence does not establish how reliably the approach would transfer to other circuits or technologies.
The source is an arXiv preprint. The supplied information does not establish whether it has been peer reviewed. Because the reported results are simulations, fabrication and physical measurement would be needed to establish how the design performs in hardware. TACS-RF is a demonstration of tool-using AI in specialized engineering; the authors’ vision of “text-to-ASIC” remains a prospect, not a result demonstrated here.
- AI agents
- RF circuit design
- sub-terahertz
- electronic design automation
- chip design
- circuit simulation
Reviewed cross-references
These connections were reviewed by a model, not independently fact-checked by a human. Similarity does not imply agreement; consult the original papers and the evidence below.
ChipOmni uses engineering checks to guide AI chip design
Shared method: Both frameworks use external engineering-tool feedback to revise designs iteratively: TACS-RF describes agent-driven schematic, EM and extraction iterations, while ChipOmni describes feedback-guided refinement across EDA tasks. Their design domains and toolchains differ, so this is a shared workflow pattern, not evidence of equivalent performance.
Model review: · openai-codex/gpt-6-luna
Evidence and provenance
Selected excerpts, not complete papers. PDF extraction can omit figures or damage equations, tables and reading order; sources may be preprints.
2610.31882v2 — Original paper
Excerpt reference:
static/papers/2610.31882v2.md:199-273
Basis: Paper text
Source SHA-256:304c9f20f92b9d54b66becf558fbf528fbbcabcab9e48eb02f735cd70aa975272611.13020v1 — Original paper
Excerpt reference:
static/papers/2611.13020v1.md:194-269
Basis: Paper text
Source SHA-256:c8516f423b179834bf3d3b6ab91c10df4b294f68a28e4477ee1362b69f1a4c03
Can AI agents improve chip designs after synthesis has done its work?
Shared method: Both works describe iterative optimization grounded in EDA results: TACS-RF refines circuits using simulation and EM results, while Dr. RTL evaluates RTL candidates with commercial synthesis and equivalence checking. The former targets an RF transmitter and the latter digital RTL timing and area, so their results are not directly comparable.
Model review: · openai-codex/gpt-6-luna
Evidence and provenance
Selected excerpts, not complete papers. PDF extraction can omit figures or damage equations, tables and reading order; sources may be preprints.
2610.31882v2 — Original paper
Excerpt reference:
static/papers/2610.31882v2.md:199-273
Basis: Paper text
Source SHA-256:304c9f20f92b9d54b66becf558fbf528fbbcabcab9e48eb02f735cd70aa975272611.13713v1 — Original paper
Excerpt reference:
static/papers/2611.13713v1.md:432-482
Basis: Paper text
Source SHA-256:2b9629e949ed0fa13ef9d1066ba920b53fe2c28c3a036d6395e76593a81d13ce
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